http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20200124324-A

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c3a2f00e72ba6e4c09b6da573427fbed
classificationCPCAdditional http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2212-7211
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-3495
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-3418
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0616
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C13-0004
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-22
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4076
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-406
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C13-0035
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0659
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0653
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-22
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C13-0033
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0688
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F3-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-06
filingDate 2019-03-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_154c86a5b6e2ae415caa139126da865d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7f27b01a10cb5e13873b4dd9525e54b1
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_807f60f9d0c3b62d32a10bc4204ab931
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a73b619e938bf72418fac70552d860f2
publicationDate 2020-11-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20200124324-A
titleOfInvention Memory media degradation detection and mitigation method and memory device using same
abstract Memory devices, systems and methods of operation thereof are provided. The memory device may include a nonvolatile memory array and control circuitry. The control circuit is configured to store a value corresponding to a plurality of activation commands received at the memory device, to update the value in response to receiving an activation command received from a host device, and the value to a predetermined threshold. In response to being exceeded, it may be configured to trigger a corrective action performed by the memory device. The control circuit is configured to store a second value corresponding to a plurality of refresh operations performed by the memory device, to update the second value in response to performing a refresh operation, and to have the value a second predetermined threshold. In response to exceeding, it may be further configured to trigger a second remedial action performed by the memory device.
priorityDate 2018-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID408137958
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID2789

Total number of triples: 34.