Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0286 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C19-184 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3648 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3688 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C19-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C19-188 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-36 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C19-28 |
filingDate |
2020-01-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d4d9be286624dc55ccecf0a4f6e26e04 |
publicationDate |
2020-02-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
KR-20200015651-A |
titleOfInvention |
Semiconductor device |
abstract |
The present invention suppresses the stress on the transistor while suppressing the occurrence of malfunction. A pulse output circuit having a function of outputting a pulse signal and controlling whether or not to set the pulse signal to a high level, the pulse output circuit comprising: a gate of the transistor in a period in which the pulse signal output by the pulse output circuit is at a low level; The potential of is not kept at a constant value, but is intermittently higher than the potential VSS. As a result, the stress on the transistor can be suppressed. |
priorityDate |
2012-07-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |