| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a2d78fe7bdca237cada3e8c947fe7c53 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B82Y10-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02271
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7926
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42392
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-792
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02326
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02332
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02337
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02126
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-125
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-785
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-022
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66833
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02164 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-792
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 |
| filingDate |
2013-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f68db2e136dba543efdfb3d277c0975d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fe7b5667f11dffe1bcdff1b94ed94eee
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9f669670c4475bffdd62759e7e8bdf36 |
| publicationDate |
2019-09-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20190108619-A |
| titleOfInvention |
Radical oxidation process for fabricating a nonvolatile charge trap memory device |
| abstract |
A method for manufacturing a nonvolatile charge trap memory device is described. The method includes applying a first oxidation process to a substrate to form a tunnel oxide layer overlying a polysilicon channel; And forming a multilayer charge storage layer on the tunnel oxide layer, the multilayer charge storage layer comprising an oxygen-rich first layer comprising nitride and an oxygen-lean second layer comprising nitride on the first layer. A second oxidation process is then applied to the substrate to form a high temperature oxide (HTO) layer that consumes a portion of the second layer and overlies the multilayer charge storage layer. The stoichiometric composition of the first layer is substantially free of traps in the first layer, and the stoichiometric composition of the second layer results in dense traps in the second layer. The second oxidation process may include a radical oxidation process or a plasma oxidation process using In-Situ Steam Generation (ISSG). |
| priorityDate |
2012-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |