http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20190084060-A

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filingDate 2017-11-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_36f34535313179a03dca8565d1664c24
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publicationDate 2019-07-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20190084060-A
titleOfInvention Gate structure and method for calculating its gate structure
abstract The present invention relates to a gate structure and a process for producing the gate structure. In particular, the present invention relates to gates that build field effect transistors with reduced thermo-mechanical stress and increased reliability (lower electromicrocation or diffusion of gate metal). The gate structure according to the present invention comprises a substrate 10; An active layer (20) disposed on the substrate; Wherein the intermediate layer 40 has a concave portion 45 extending toward the active layer 20 through the entire intermediate layer 40. The intermediate layer 40 is formed on the active layer 20, Middle layer; And a contact element (50) disposed within the recess (45), wherein the contact element (50) completely fills the recess (45) and extends over the intermediate layer (40) 50) comprises a contact element (50) at least partially resting directly on the intermediate layer (40); The contact element 50 is made of Schottky metal 52; And the contact element 50 is completely surrounded by the Schottky metal 52.
priorityDate 2016-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 30.