| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3065 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-30604
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66795
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823431
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02041
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02057
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0886
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7851
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-785
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7855
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66348
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0653
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02227
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66636
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7848
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0847 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2018-01-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8a69a0059b1dd470146d9f981f892dc7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_466fe7fd24efd2748e2c5db403a688a8
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_91c0e734c1bedc785a6558e3e0d5a7db
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6c0f4818bed85c26b240fee620a0701e |
| publicationDate |
2019-05-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20190049329-A |
| titleOfInvention |
Integrated circuit device with source/drain barrier |
| abstract |
Various examples of integrated circuit devices and methods for forming devices are disclosed herein. In an example, the method includes receiving a workpiece comprising a substrate, and a device pin extending over the substrate. The device pin includes a channel region. A portion of the device pin adjacent to the channel region is etched, and the etch creates a source / drain recess and forms a dielectric barrier in the source / drain recess. The workpiece is cleaned such that the lowermost portion of the dielectric barrier remains within the lowermost portion of the source / drain recess. A source / drain feature is formed in the source / drain recess such that the lowermost portion of the dielectric barrier is disposed between the source / drain feature and the rest of the device pin. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20210148903-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20210106317-A |
| priorityDate |
2017-10-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |