| abstract |
A semiconductor device according to an aspect of the present invention includes a plurality of memory cells MC, a plurality of memory cells WL connected to corresponding memory cells of a plurality of memory cells MC, and a plurality of word lines WL , Storing / erasing some captured row-addresses into a first number of registers, and responding to a first number of accesses of a word line (WL) to one word line in a first time period And comparing it with the stored address. According to the present invention, the access history can be precisely analyzed by a small-scale circuit configuration, and measures can be taken, for example, for a low-hammer problem. |