| abstract |
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having channel patterns on a substrate; A pair of source / drain patterns disposed on both sides of each of the channel patterns; And a gate electrode surrounding the channel patterns on the substrate. Wherein the gate electrode includes a first recessed upper surface between the adjacent channel patterns, the channel patterns are vertically spaced from the substrate, and the gate electrode is spaced from the channel pattern Fill them. |