| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fa80eed27901ac84139c7a7109c21e17 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78606
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-133514
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-3248
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-1333
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-3232
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-323
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-322
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78618 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1335
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1333
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-32
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 |
| filingDate |
2015-12-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7de27e01bafa6645d2972f13e4f6610b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_71a888515a21cd5d817ff38a26c927b6
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e4b2fc34bbfc8e6555eec55c09f4dcbc
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c5d3c673a6444a8de54ab62d4cd4395f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_555d87f5e8143f70075efe3036b279a9 |
| publicationDate |
2017-06-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20170074622-A |
| titleOfInvention |
Tft substrate, display panel and display device having the same |
| abstract |
A thin film transistor substrate according to an embodiment includes: a support substrate; A bonding layer disposed over the support substrate; A channel layer disposed on the bonding layer and including a nitride based semiconductor layer and having a recessed region recessed upward in the lower surface thereof, a source electrode electrically connected to the first region on the lower surface of the channel layer, A thin film transistor including a drain electrode electrically connected to the second region and a gate electrode arranged in a recessed region of the channel layer; A pixel electrode disposed on the thin film transistor and electrically connected to the drain electrode of the thin film transistor; . ≪ / RTI > |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11569318-B2 |
| priorityDate |
2015-12-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |