| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823437 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-517
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42312
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7846
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0207
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66871
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28123
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-51
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2015-11-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1c6d1ebab7035a42d810d3e79ac1d483
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_84292be22ae8f280d9e3afe87a794b70 |
| publicationDate |
2016-08-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20160100212-A |
| titleOfInvention |
Semiconductor device with dummy gate structures |
| abstract |
A semiconductor and a method for manufacturing a semiconductor device are provided. A semiconductor substrate is provided. A first oxide layer is formed over the active region. A first STI is formed adjacent the first side of the active region and a second STI is formed adjacent the second side of the active region. A gate layer is formed over the first STI, the second STI, and the first oxide layer. A masking element is formed on the gate layer. The gate layer is etched using a masking element to form a first gate electrode over the first oxide layer, a first dummy gate electrode over the first STI, and a second dummy gate electrode over the second STI. The width of the first gate electrode is smaller than the width of the first dummy gate electrode and the width of the second dummy gate electrode. |
| priorityDate |
2015-02-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |