http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20160099631-A

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filingDate 2014-12-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8fdbacb9b882c54b388ee216dc207c40
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publicationDate 2016-08-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20160099631-A
titleOfInvention Methods of forming segmented vias for printed circuit boards
abstract There is provided a novel method for forming a printed circuit board (PCB) having one or more segmented vias, including an improved method of removing catalyst after a plating process when forming segmented vias in a PCB. After electroless plating, the excess catalyst on the surface of the plating resist is removed using a catalyst remover, such as an acidic solution containing at least nitrite or nitrite ions and halide ions, or the catalyst remover may be removed with an alkali permanganate compound solution, , Argon, and tetrafluoromethane, or a mixture of at least two of these gases. After removal of the excess catalyst, electrolytic plating is applied through the through-holes and an outer layer circuit or signal trace is formed. This is the etching of the path on the conductive foil / layer of the core structure.
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