| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_bce787970b69aeb08d159e7c101c9ed7 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02274
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01J2237-334
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02164
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2221-1063 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76826
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76829
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76807
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76814
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02164
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01J37-32357
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01J37-32449
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31116
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01J37-32082
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02274 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-311
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01J37-32 |
| filingDate |
2014-07-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d04be56a9d142d17374c31321a508079
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3f8b6ba95903cfeaf2c87be506de246c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d5f85df8d707ad15398a9581eaabc09e |
| publicationDate |
2016-05-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20160055227-A |
| titleOfInvention |
Methods for stabilizing an interface post etch to minimize queue time issues before next processing step |
| abstract |
Methods are provided for etching a dielectric barrier layer disposed on a substrate using a low temperature etch process in conjunction with a subsequent interfacial protection layer deposition process. In one embodiment, a method for etching a dielectric barrier layer disposed on a substrate includes: transferring a substrate over which a dielectric barrier layer is disposed into an etch process chamber; Performing a treatment process on the dielectric barrier layer; Remotely generating a plasma in an etch gas mixture supplied into an etch processing chamber to etch the processed dielectric barrier layer disposed on the substrate; Plasma annealing the dielectric barrier layer to remove the dielectric barrier layer from the substrate; And forming an interfacial protective layer after the dielectric barrier is removed from the substrate. |
| priorityDate |
2013-09-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |