| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_099413ae0cf5a2b6398b5151766cd260 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78675
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02422
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78654
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02502
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1218
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02494
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02488
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02532
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66757
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66772
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02686
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78603
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1285 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-32
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 |
| filingDate |
2014-08-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0136597cc93aa9cf322391851b12a1b0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_81c5b99719dac35e73cc809f7adb187b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f6d7e9ad5135ece3414f3609aaad8958
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a139fd5ddec40a1d9e42fd9e936b75d8 |
| publicationDate |
2016-02-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20160017330-A |
| titleOfInvention |
Semiconductor device, manufacturing method thereof and display apparatus |
| abstract |
One embodiment of the present invention provides a semiconductor device comprising: a buffer layer disposed on a substrate, the buffer layer including an inclined surface on an upper surface; A crystalline silicon layer disposed on the buffer layer; A gate electrode disposed on the crystalline silicon layer so as to be insulated from the crystalline silicon layer; And a source electrode and a drain electrode electrically connected to the crystalline silicon layer, respectively, wherein an angle formed by the substrate and the inclined surface is not less than about 17.5 degrees and less than about 70 degrees. |
| priorityDate |
2014-08-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |