| abstract |
In the method of manufacturing a semiconductor device, a dummy gate structure including a dummy gate insulating film pattern, a dummy gate electrode, and a gate mask is formed on a substrate. An interlayer insulating film covering the dummy gate structure is formed on the substrate using the TOZ. The upper part of the interlayer insulating film is planarized until the gate mask is exposed to form an interlayer insulating film pattern. The exposed gate mask, the dummy gate electrode under the exposed gate mask, and the dummy gate insulating film pattern are removed to form an opening exposing the upper surface of the substrate. While leaving the interlayer insulating film pattern, the dummy gate insulating film pattern is etched using a hydrofluoric acid (HF) . Forming a gate structure filling the openings. |