http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20150143550-A

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classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-0013
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-403
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-1776
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-403
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-00
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filingDate 2014-04-10-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f81cc9178b5c479b6b99c6247f6a8358
publicationDate 2015-12-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20150143550-A
titleOfInvention Storage device and semiconductor device
abstract The present invention provides a low power memory device. The memory device includes a first transistor, a second transistor, a logic element, and a semiconductor element. The second transistor controls the supply of the first signal to the gate of the first transistor. When the potential of the input second signal changes from the first potential to the second potential lower than the first potential, the logic element changes the potential of the first terminal of the first transistor from the second potential to a potential lower than the second potential 3 potential, the potential of the first terminal of the first transistor is changed from the third potential to the first potential. The semiconductor device has a function of bringing the second terminal of the first transistor into a floating state. The first transistor includes a channel formation region in the oxide semiconductor film.
priorityDate 2013-04-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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