| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2213-79
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2213-52
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2213-82 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-16
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C13-0021
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-165
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C13-025
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C13-003
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C13-0004
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C13-0002
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C13-0007
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-1675
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-161
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-1659 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C13-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-00 |
| filingDate |
2014-04-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_edad3351739f382cb56dcdbce193e526
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_916a2139c90d730a501b8e02361b56ec |
| publicationDate |
2015-10-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20150118651-A |
| titleOfInvention |
Semiconductor memory device |
| abstract |
There is provided a semiconductor memory device including variable resistance memory cells. A semiconductor memory device includes a first memory segment including a plurality of first variable resistive memory cells arranged in first and second directions perpendicular to each other and a first source line electrically coupled in common to the first variable resistive memory cells, And a second memory segment including a plurality of second variable resistive memory cells arranged in the first and second directions and a second source line electrically connected in common to the second variable resistive memory cells, 1 and the second source lines can be electrically separated from each other. |
| priorityDate |
2014-04-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |