http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20150056459-A

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filingDate 2014-10-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_aa54170f42e3bbb0dbe1c16c1d4a405b
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publicationDate 2015-05-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20150056459-A
titleOfInvention Inter-level connection for multi-layer structures
abstract A system and method for fabricating a semiconductor device structure are provided. An exemplary semiconductor device structure includes a first device layer, a second device layer, and an interlevel connection structure. The first device layer comprises a first conductive layer, and a first dielectric layer formed on the first conductive layer, wherein the first device layer is formed on the substrate. The second device layer comprises a second conductive layer, and a second device layer is formed on the first device layer. The inter-level connection structure is configured to electrically connect the first conductive layer and the second conductive layer and includes at least one conductive material, and the inter-level connection structure penetrates at least a portion of the first dielectric layer. The first conductive layer is configured to electrically connect to the first electrode structure of the first semiconductor device in the first device layer.
priorityDate 2013-11-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 23.