| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_099413ae0cf5a2b6398b5151766cd260 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2300-0408
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-08 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3677
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3611
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-36 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-36 |
| filingDate |
2013-09-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fa7de78246d49d227561cf7aa788f224
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e1da9395926451984d935c87a1f86d7a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8ea34de40530fa22170ef3607e59ecca
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4ea6b421ddb05a2766328829c4e8b2ab
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_63a385731558e01584a0b0a1486bee8f |
| publicationDate |
2015-03-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20150031899-A |
| titleOfInvention |
Gate driving circuit and a display apparatus having the gate driving circuit |
| abstract |
An Nth (N is a natural number) stage of a gate driving circuit in which a plurality of stages are connected in a dependent manner to output a plurality of gate signals controls one of the previous stage carry signals in response to a carry signal of any of the previous stages A pull-up control unit for applying a first clock signal to the control node in response to a signal applied to the control node, a pull-up control unit for outputting a first clock signal as an Nth gate signal in response to a signal applied to the control node, A first pull-down section for pulling down the control node to a second off voltage in response to a carry signal of any one of the following stages, a carry section for outputting a carry signal, A second pull-down section for pulling down the gate signal to the first off voltage, an n-th gate line connected to the n-th gate line, And a second output connected to the (n + 1) -th gate line in response to a second clock signal having a small period with respect to the first clock signal, And outputs a clock signal and an n + 1-th gate signal in response to a second inverted clock signal whose phase is inverted. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9875710-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9870730-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10255845-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9837036-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10235955-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20180084753-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10360865-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10720117-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10186198-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10096294-B2 |
| priorityDate |
2013-09-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |