http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20140025577-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a62555ff12316a9a118542896b4c0af7 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1288 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78618 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-124 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136286 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41733 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-127 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-417 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1362 |
| filingDate | 2012-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bc943d427825919c52017b696cecb094 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6ce2a24ff37007d72a56d523c30a6bc3 |
| publicationDate | 2014-03-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-20140025577-A |
| titleOfInvention | Thin film transistor array substrate and its manufacturing method |
| abstract | Embodiments of the present invention disclose a thin film transistor array substrate and a production method thereof, the method comprising: forming an active layer thin film and a conductive layer thin film on a substrate; In order to form at least two data lines, pixel electrodes and source / drain electrodes of the thin film transistor TFT, a source / drain electrode layer thin film is deposited on the conductive layer thin film, and the conductive layer is formed using a gray tone or halftone masking process. Processing the thin film and the source / drain electrode layer thin film; Depositing an insulating layer thin film covering the active layer thin film, the source / drain electrodes, data lines and the pixel electrode to form an active layer of the TFT, and then forming a gate insulating layer and a through hole of the TFT on the insulating layer; And forming a gate electrode of the TFT, and at least two gate scan lines that intersect the data lines. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-D939563-S |
| priorityDate | 2012-02-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 29.