http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20110102408-A

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_82a9e22a923eca64a02a97f0dfb493ed
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M1-466
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M1-462
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M1-12
filingDate 2009-12-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4e7ae7cdaa09b0ebbb2741965d9f6f1c
publicationDate 2011-09-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20110102408-A
titleOfInvention Apparatus and Method for Continuous Approximation Analog-to-Digital Conversion
abstract A continuous approximation analog-to-digital converter (ADC) includes a binary-weighted capacitor array, a quantizer and a control block. One end of each capacitor is connected to the input of the quantizer, and the second end of each capacitor is controlled by a control block through a driver. The voltage is sampled, quantized and stored as the most significant bit of the output of the ADC. As a result of the quantization, the control block toggles the driver of one of the capacitors corresponding to the most significant bit. The voltage at the common node is sampled again to obtain the second bit of the output of the ADC. The operation is repeated as necessary to obtain and store additional bits of the ADC's output. Similar configurations and processes are described for the differential ADCs. Operation is asynchronous and allows timeout for metastable states only when these metastable states occur.
priorityDate 2008-12-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

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Total number of triples: 16.