http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20110099585-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_8d0fc2b70675ee19bd5fc464f5ae9061 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06K19-07318 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-00338 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-094 |
| filingDate | 2010-03-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2125d602e7a505437626b085b49f841c http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6baa1d578c640d59e0f0946c808c2fcd http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b0c840efcf5c77a5c44b15fdc7aba86d |
| publicationDate | 2011-09-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-20110099585-A |
| titleOfInvention | Logic Circuits Secure Against Power Analysis Attacks |
| abstract | A logic circuit is disclosed that is a three phase mode of operation that is precharge, evaluation and discharge. The logic circuit comprises an evaluation stage latch unit in which a first pair of transistors connected in parallel and a second pair of transistors connected in parallel are symmetrically connected and function during an evaluation phase, a dynamic current source source of the logic circuit and a first A dynamic current mode unit in which a transistor and a second transistor are connected in series, and a first discharge step control transistor connected to an output terminal connected to the first transistor pair, and a second discharge step control connected to an output terminal connected to the second transistor pair And a discharge step control unit including a transistor and a third discharge step control transistor connected between the first transistor and the second transistor. Due to the capacitance imbalance at the output node, the amount of power charged and discharged varies depending on the input value, and a constant amount of power is consumed every clock regardless of the input value. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101332376-B1 |
| priorityDate | 2010-03-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419550148 http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID44719587 |
Total number of triples: 18.