http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20100097960-A

Outgoing Links

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http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F12-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F9-06
filingDate 2009-02-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1041be2e6238c28cbf7dd56fa90ae36c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_250a1d638c9c7bb062c1b8e968be03c1
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publicationDate 2010-09-06-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20100097960-A
titleOfInvention Data management method of memory system and its flash translation layer
abstract According to an embodiment of the present disclosure, a data management method of a flash translation layer may include determining a size of input data, and storing the input data in a log block if the size of the input data is a write unit and determining the size of the input data. If the size is smaller than the write unit, the method may include storing in a partial block, wherein the log block is a temporary block in which data of the same address is stored, and the partial block is a temporary block in which data is stored regardless of the address.n n n A memory system according to an exemplary embodiment of the present invention includes a nonvolatile memory and a memory controller for controlling the nonvolatile memory, wherein the memory controller includes any one memory block even if input data smaller than a write unit does not have the same address. Temporarily store in
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2013176376-A1
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Total number of triples: 19.