| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b3310ea86f3c492f6c09d7be6592866d |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-181
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-09701
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-3511 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-24
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-3121
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-94
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-561 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-301 |
| filingDate |
2008-12-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4c0342e71ef1725281ada87e22a0b740
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_171740f7cd3d348381a5971726f3e3e3
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_91e3557a4ea9fb62b69e216b4cb35afc
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ad2cbf49d31e9de546b7cd5c37a1118b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_662c65436968f1248f12b1b69c064d7c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_442b48ca2c44f143a876340d1dff5104 |
| publicationDate |
2010-06-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20100071485-A |
| titleOfInvention |
Manufacturing Method of Wafer Level Package |
| abstract |
The present invention relates to a method of manufacturing a wafer level package, comprising: preparing a substrate wafer having a plurality of pads formed on a lower surface thereof, a plurality of chips disposed on an upper surface thereof, and a dicing line for dividing the chips; Forming an external connection means on the pad; Disposing a mask exposing only the dicing line on the substrate wafer to apply a resin to the dicing line; Removing the mask; Encapsulating the chip disposed on the substrate by applying an encapsulant; Removing the resin applied to the dicing line; And cutting and uniting the resin along the exposed dicing line to remove the resin. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10971662-B2 |
| priorityDate |
2008-12-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |