| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1a492183be65153abfa7dec00d51c816 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2029-5602 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-44
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-56
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-56008 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-10 |
| filingDate |
2008-11-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1ba2ab0b4e6975faf7ecaa41e8eaba81 |
| publicationDate |
2010-06-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20100060205-A |
| titleOfInvention |
Semiconductor memory device and test circuit for same |
| abstract |
A test circuit of an open bit line structure semiconductor memory device, which is configured to share a sense amplifier block in response to test data read from a plurality of memory cells included in a cell under test and a compression control signal output from a compression control signal generator. And a compression unit which sequentially compresses test data read from the memory cells and sequentially outputs a compressed test signal. |
| priorityDate |
2008-11-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |