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filingDate 2007-05-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9b7941d7a70822643ff47575ca6b0831
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publicationDate 2009-02-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20090016687-A
titleOfInvention Parallel Bit Interleaver for Wireless Systems
abstract The present invention relates to systems and methods provided for processing wireless data packets. The method includes determining a subset of data bits to be processed at a wireless transmitter and using a clock edge to store the data. The clock edge allows parallel mapping of at least two bits into interleaver memory from a subset of data bits per given clock edge. From the memory, other encoding and scrambling processes are applied before sending data packets over the wireless network.
priorityDate 2006-05-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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