http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20080087612-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823871 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76816 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7843 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823807 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-02 |
| filingDate | 2007-05-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_036ae48d6bbe622578a813007fef1f04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6425d531d5c70d6c61652c637f25cc36 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_89be710039124a0a29cae749919a3b54 |
| publicationDate | 2008-10-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-20080087612-A |
| titleOfInvention | A manufacturing method of an integrated circuit device, a manufacturing method of a semiconductor element, and a semiconductor element manufactured thereby |
| abstract | A method of manufacturing an integrated circuit device and a circuit manufactured thereby are provided. A method of manufacturing an integrated circuit device includes forming first, second, and third transistors in a semiconductor substrate, and covering the first and second transistors with a first electrical insulating film having sufficiently high internal stress characteristics to channel regions of the first transistor. Impart net tensile or compressive stress to the second transistor and cover the second and third transistors with a second electrical insulating film having sufficiently high internal stress characteristics to impart net compressive or tensile stress to the channel region of the third transistor, Selectively removing the first region of the second electrical insulating layer extending toward the gate electrode of the gate to define a first opening extending through the second electrical insulating layer, and extending the gate electrode side of the first transistor. A second field selectively removing the first region and simultaneously extending to the gate electrode side of the third transistor And selectively removing the second insulating film region of the enemy, the involves defining a second aperture extending through the first opening and the second electrically insulating layer extending over the first electrically insulating film. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101149646-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9299734-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8216905-B2 |
| priorityDate | 2007-03-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 26.