http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20080079187-A

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e5db580deca7130dbe51805c6c608b35
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-408
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-408
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filingDate 2008-01-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ecf128c45838d5f597573e2b3f6a79c6
publicationDate 2008-08-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20080079187-A
titleOfInvention Memory controller, access control method and system of semiconductor memory
abstract An object of the present invention is to efficiently perform a precharge operation of a plurality of banks and to improve access efficiency of a semiconductor memory.n n n The memory controller sequentially holds access requests including access addresses. The semiconductor memory is composed of a plurality of banks each having a plurality of pages. The memory controller determines the page hit / page miss of the bank corresponding to each of the held access addresses. The memory controller outputs an all bank precharge command for performing precharge operations for all banks when it is determined that the access efficiency is improved by analyzing successive access addresses. Since a plurality of banks can be precharged by one all-bank precharge command, even when there are few empty cycles for inserting a command, the command can be efficiently supplied to the semiconductor memory according to the state of the bank.
priorityDate 2007-02-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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