| abstract |
The integrated circuit includes a semiconductor substrate, a low dielectric constant layer on the semiconductor substrate, a first opening on the low dielectric constant layer, and a first diffusion barrier layer covering the low dielectric constant layer on the first opening, wherein the first diffusion barrier layer is a sidewall. It has a bottom region associated with the region, and the sidewall region has a top surface adjacent to the top surface of the low dielectric constant layer. The integrated circuit further comprises a conductive line having a top surface lower than the top surface of the sidewall region of the diffusion barrier layer and a metal cap on the region located directly on the conductive line. |