| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fdad00677b9268c26e005a9e03a7b9dd |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2211-5621
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2211-565
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2211-5642 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0483
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-021
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-028
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-5628
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-147
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-5642
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-344
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-3454
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-3445
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-3459
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-02 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-115
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247 |
| filingDate |
2006-12-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_09c77ad624526beae545eb4bf3a9b170 |
| publicationDate |
2007-06-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20070066911-A |
| titleOfInvention |
High Speed Writeable Semiconductor Memory Devices |
| abstract |
The memory cell array 1 has a plurality of series-connected memory cells connected to a word line WL and a bit line BL and arranged in a matrix. The selection transistor HVNTr selects from word lines. The control circuit controls the potential of the word line and the bit line in accordance with the input data, and controls the data write operation, data read operation and data erase operation performed on the memory cell. The select transistor is formed on the substrate. In the read operation, the substrate is supplied with a first negative voltage, a selected word line is supplied with a first voltage (first voltage ≥ first negative voltage), and a non-selected word line is supplied with a second voltage. |
| priorityDate |
2005-12-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |