http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20070048070-A
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37 |
classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0291 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3614 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3688 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-096 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-133 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-36 |
filingDate | 2005-11-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3245f58c152bada5a78222e8fde97a11 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_69494881b0f82c4abc608b61ec6f9883 |
publicationDate | 2007-05-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | KR-20070048070-A |
titleOfInvention | Output circuit and display device of source driver |
abstract | An output circuit and a display apparatus of a source driver are disclosed. The output circuit of the source driver includes a plurality of amplifiers, a first buffer, a second buffer, and a plurality of transmission gates. Each of the amplifiers outputs an output voltage at the same level as the input voltage. The first buffer receives and buffers the clock signal CLK1, and increases the fall time of the buffered clock signal to output to the control terminal of each of the transmission gates (gate terminal of the P-channel transistor). The second buffer buffers and inverts the clock signal, increases the rise time of the inverted signal, and outputs the inverted control terminal (gate terminal of the N-channel transistor) of each of the transmission gates. Each of the transmission gates passes or blocks an output voltage of a corresponding one of the amplifiers in response to an output signal of the first buffer and an output signal of the second buffer. The display apparatus includes a source driver having a display panel, a gate driver, and an output circuit of the source driver according to the present invention.n n n n Source Driver, Slew Rate, Buffer |
priorityDate | 2005-11-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 22.