http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20070002304-A

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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66825
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filingDate 2005-06-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9ceff4f117f12c16c91fdc899a45380d
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publicationDate 2007-01-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20070002304-A
titleOfInvention Trench isolation film formation method for semiconductor devices
abstract BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a trench isolation layer for a semiconductor device, and the device isolation layer is formed of an atomic layer deposition oxide layer having excellent step coverage characteristics, or an O 3 -TEOS (HARP) or a PSZ ( After forming the device isolation layer using polysilizane) or APL (flowfill) oxide film, perform wet annealing process under reduced pressure or radical oxidation process to remove naturally occurring voids and seams in the device isolation film, or bowing in the device isolation trench. A high density plasma or atomic layer deposition oxide is deposited so that the trench for device isolation is completely filled with O 3 -TEOS (HARP), PSZ (polysilizane), or APL (flowfill) oxide. After forming the separator and performing a subsequent annealing process to remove the naturally occurring voids and seams in the device separator.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9054037-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100870322-B1
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100855272-B1
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type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 28.