http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20060067091-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b2b31f8612f522a744762d83c23879ba |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/A61F2007-0054 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/A61F2007-0045 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/A61F2007-0086 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/A61F7-08 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 |
| filingDate | 2005-04-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2e9d7d21398c733efb4bc0ce23a8ebab http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ec93ee7762e350920cb9d20e0ae89391 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f86659ee3ea95e74a03cb26bb832b705 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e48c19b0d0c7619c8a1e073da85cebfa http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0c4abddc648f1d0948592aa854924efc http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2cc82b739ff2842c6590431577626f3a |
| publicationDate | 2006-06-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-20060067091-A |
| titleOfInvention | Transistor using collision ionization and its manufacturing method |
| abstract | A transistor using collision ionization and a method of manufacturing the same are provided. According to the present invention, a gate dielectric layer, a gate, and first and second sidewall spacers are formed on a semiconductor substrate, and an impurity is implanted into the semiconductor substrate, thereby masking the gate and the first and second spacers. A first impurity layer spaced apart from the spacer and a second impurity layer extending overlapping under the second spacer are formed. Sources and drains that set the semiconductor substrate regions therebetween as ionization regions are formed on the semiconductor substrate so as to be self-aligned to the first and second spacers, respectively. In this case, the source is formed to include a first metal silicide layer to form a schottky junction with the ionization region, and the resistive contact with the second impurity layer portion and the second impurity layer region where the drain overlaps under the second spacer. and a second silicide film aligned with the second spacer to form an ohmic contact.n n n n Collision ionization, avalanche breakdown, silicides, Schottky barriers, asymmetric source drains |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100891462-B1 |
| priorityDate | 2004-12-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 41.