http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20050108072-A

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filingDate 2004-05-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8d64c9f116457dd6b3804a8fbd1aca20
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publicationDate 2005-11-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20050108072-A
titleOfInvention Slurry for polishing and method of polishing substrates
abstract BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polishing slurry, which is used in a CMP process for an STI process, which is essentially applied to an ultra-high density semiconductor manufacturing process having a design rule of 256 mega DRAM or more, for example, 0.13 µm or less. It relates to a slurry having a high selectivity ratio of the oxide layer to the layer and a method for producing the same. The present invention is suitable for the STI process of ultra-high density semiconductor manufacturing process of 0.13㎛ or less by appropriately operating the method and apparatus for pretreatment of abrasive particles, dispersion equipment and its operation method, method and amount of adding chemical additives, transporting device for samples and the like. The present invention relates to the preparation of high performance nano ceria slurries that are essential for a CMP process.
priorityDate 2004-05-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 28.