http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20050071049-A
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_efd77c1983329ca444312479161a8c18 |
classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02126 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76232 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L22-26 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31053 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31116 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-762 |
filingDate | 2003-12-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ef881757cd34712b0038b209ab1864ed |
publicationDate | 2005-07-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | KR-20050071049-A |
titleOfInvention | A method for forming an isolation layer of a semiconductor device |
abstract | In the shallow trench isolation (STI) manufacturing process of the semiconductor device, the device isolation film of the semiconductor device to prevent the step difference generated on the surface of the field region and the active region after the chemical mechanical polishing (CMP) planarization It relates to a forming method. A device isolation film forming method of a semiconductor device according to the present invention includes the steps of: forming a pad oxide film and a nitride film on a semiconductor substrate; Forming a photoresist pattern on the nitride film to etch the nitride film and the pad oxide film, and to form a trench by etching a surface exposed portion of the semiconductor substrate to a predetermined thickness; Depositing a liner oxide over the entire surface along the trench inner interface to prevent damage to the trench; Depositing and planarizing a filler to sufficiently fill the trench; Selectively etching the filler in the planarized trench to the bottom of the nitride film; And removing the nitride film. According to the present invention, the wafer yield can be improved by minimizing the step difference of the field oxide film generated during the CMP planarization process in the STI manufacturing process, thereby eliminating the process defect due to the step difference in the subsequent process. |
priorityDate | 2003-12-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 18.