http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20050067443-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1a492183be65153abfa7dec00d51c816 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28202 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-266 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823462 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8228 |
| filingDate | 2003-12-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_558b8c924aaed86a0fbda790785cea0c |
| publicationDate | 2005-07-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-20050067443-A |
| titleOfInvention | Fabricating method of dual gate oxide in semiconductor device |
| abstract | BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a gate oxide film having a relatively thin thickness using an ion implantation method in a process of forming a double gate oxide film. According to the present invention, in the method of manufacturing a semiconductor device having a cell region and a peripheral circuit region, forming an isolation layer defining an active region and a field region on a semiconductor substrate including the cell region and the peripheral circuit region. step; Forming a screen oxide film on the semiconductor substrate including the cell region and the peripheral circuit region, and forming a buffer film on the screen oxide film; Forming a mask to open only the cell region, and performing nitrogen ion implantation using ion implantation energy in the range of 20 to 80 kev; Removing the mask, the buffer layer, and the screen oxide layer, and then forming a gate oxide layer to form a gate oxide layer having a relatively thin thickness in the cell region, and forming a gate oxide layer having a relatively thick thickness in the peripheral circuit region. ; And forming a gate electrode on the gate oxide film. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100762897-B1 |
| priorityDate | 2003-12-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419556970 http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419579069 http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID947 |
Total number of triples: 19.