http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20050066168-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1a492183be65153abfa7dec00d51c816 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-48 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76801 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76897 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 |
| filingDate | 2003-12-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7daac5ea37a9261532176d201ed0555c |
| publicationDate | 2005-06-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-20050066168-A |
| titleOfInvention | Manufacturing method of semiconductor device |
| abstract | BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device. Specifically, LP (low voltage) and low equipment (LP) are used without using a plasma on a film on which a word line pattern and a plug are formed. A low pressure-tetraethoxysilicate glass (TEOS) film is formed as a lower first interlayer dielectric capping layer (hereinafter referred to as " ILD1C "), and a spin-on glass (SOG) film having a low Vt leakage current is formed on the top ILD1C. By preventing the gate oxide film from being damaged during the ILD1C formation process, it is possible to reduce the BV failure ratio and threshold voltage (hereinafter referred to as “Vt”) to increase the reliability of the gate oxide film. It relates to a method for manufacturing a semiconductor device that can be. |
| priorityDate | 2003-12-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 21.