http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20050062921-A

Outgoing Links

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1a492183be65153abfa7dec00d51c816
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G03F7-095
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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-027
filingDate 2003-12-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9f323990ae6a6105016defb512b2bf05
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publicationDate 2005-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20050062921-A
titleOfInvention Method for forming three-layered photoresist pattern of semiconductor device
abstract The present invention relates to a method of forming a three-layer resist pattern of a semiconductor device, comprising: applying a lower resist composition on an etched layer and baking the same to form a lower resist film; and forming a resist composition containing silicon on the lower resist film. Applying and baking to form a silicon-containing resist film; treating the silicon-containing resist film with an O 2 plasma to form an oxide film; applying and baking an upper resist composition on the oxide film to form an upper resist film Selectively exposing and developing the upper resist layer to form an upper resist layer pattern, etching the oxide layer using the upper resist layer pattern as an etch mask to form an oxide layer pattern, and etching the oxide layer pattern The lower ledge as a mask Agent by etching a film discloses a three-layer resist pattern forming method of the semiconductor device including the step of forming a lower resist film pattern.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-112271133-A
priorityDate 2003-12-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 25.