http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20050004964-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-13454 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136286 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136227 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-13452 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-1368 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-136 |
| filingDate | 2003-06-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1132cc0685b9e599f42d13a4564e2908 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a0a02114c7cee445b9e78575a4683de4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_51d57c715c68ae49253e2dd99393e513 |
| publicationDate | 2005-01-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-20050004964-A |
| titleOfInvention | Thin film transistor array panel |
| abstract | In a thin film transistor array panel according to an exemplary embodiment of the present invention, a display cell array circuit including a plurality of gate lines, a plurality of data lines, a thin film transistor, and a pixel electrode formed on an insulating substrate, and data transferred to a plurality of data lines. A data driver circuit for transmitting a signal, a gate driver circuit for transmitting a scan or gate signal to a plurality of gate lines, and a gate driver circuit for forming a power supply voltage or a timing signal to the gate driver circuit from outside. It includes a plurality of signal lines to transmit. At this time, the signal line exposes the first wiring, the second wiring, the first wiring, and the second wiring formed of different layers, and contacts the first wiring and the second wiring through the contact hole of the insulating film having the boundary line of petal shape or uneven structure. It includes a connecting member for connecting the first and second wiring. |
| priorityDate | 2003-06-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 47.