http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20040087457-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6f1cdac90c4272d2ed510122d7153738 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-32137 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76235 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-32134 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31051 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-762 |
| filingDate | 2003-04-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f0aeec547e23f2e991b94fa5821850e4 |
| publicationDate | 2004-10-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-20040087457-A |
| titleOfInvention | Method for forming STI of semiconductor device |
| abstract | The present invention discloses a device isolation film forming method of a semiconductor device. The disclosed invention comprises the steps of laminating a pad oxide film and a polysilicon layer on a semiconductor substrate; Forming a photoresist pattern defining a device isolation region on the polysilicon layer; Selectively removing the polysilicon layer and the pad oxide layer using the photoresist pattern as a mask to expose a portion of the semiconductor substrate; Forming a spacer on sidewalls of the polysilicon layer pattern and the pad oxide layer pattern, the portions of which are selectively removed after the photoresist pattern is removed; Selectively removing the exposed portion of the semiconductor substrate using the spacer as a mask to form a trench in the semiconductor substrate, and then removing the spacer; Performing an oxidation process to form an oxide film on the surface of the entire structure, and then forming a planarized oxide film thereon to fill gaps; Selectively removing the planarization oxide layer and the oxide layer to stop etching in the polysilicon layer pattern region through a planarization process; And forming a device isolation film by removing the remaining polysilicon layer pattern. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8618596-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100577306-B1 |
| priorityDate | 2003-04-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID944 http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419559357 http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419579069 |
Total number of triples: 19.