http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20040067019-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1a492183be65153abfa7dec00d51c816 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823418 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66507 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823443 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 |
| filingDate | 2003-01-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_73bf99a024ad430db7132f31c2e081bf http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_53bbfd59911bb5eef42b5453bb506893 |
| publicationDate | 2004-07-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-20040067019-A |
| titleOfInvention | Method for forming salicide of semiconductor device |
| abstract | The present invention discloses a method of forming a salicide of a semiconductor device. The disclosed invention,n n n Forming a first gate oxide film having a thick thickness and a second gate oxide film having a thickness thinner than the first gate oxide film in each of the salicide region and the salicide region of the silicon substrate; After forming a conductive layer and a nitride film-based hard mask layer on the upper surface of the entire structure, the conductive layer, the hard mask layer, and the first gate oxide film and the second oxide film are selectively removed to provide an unsalicide region and a salicide region, respectively. Forming a gate electrode and simultaneously revealing an active region of the salicide region; Forming an oxide film on an upper surface of the entire structure except the hard mask layer; Forming a spacer on the side of the gate electrode and exposing an active region of the salicide region; Removing portions of the hard mask layer remaining on the gate electrodes of the non-salicide region and the salicide region; And forming a salicide film on an upper surface of the gate electrode of the non-salicide region, the salicide region, and an active region surface of the salicide region, and including a salicide or a Co- in one chip of the semiconductor device. The salicide region and the non-salicide or non-cosalicide region can be selectively formed simultaneously, thereby reducing the number of process steps. |
| priorityDate | 2003-01-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 17.