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classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K3-356113
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-0013
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-0185
filingDate 2002-12-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8b6261fe21c241875a9b96b380514fca
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0020a729d49488591f10ccae33849f48
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publicationDate 2004-07-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20040057407-A
titleOfInvention Low power inverter and level shifter using the same
abstract The present invention relates to a low power inverter and a level shifter, and more particularly, to a low power inverter and a level shifter using the same as a P-type transistor or an N-type transistor for driving circuit integration of an active driving display.n n n The low power inverter of the present invention and the level shifter using the same are composed of transistors of the same conductivity type, and the voltage between the gate and the source of the transistor is controlled by adjusting the channel length and width of each transistor so that the clock feed-through effect is different. The signal is inverted with respect to the clock signal by adjusting the difference. In addition, a low power level shifter can be configured by using the inverted signal output characteristic.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100704017-B1
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2009145441-A2
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priorityDate 2002-12-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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