http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20040001874-A

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classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02183
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76224
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-76
filingDate 2002-06-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b40f516b99676fa7086d2d425d4031e4
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publicationDate 2004-01-07-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20040001874-A
titleOfInvention Method for forming trench type isolation layer in semiconductor device
abstract BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing technology, and more particularly, to a device isolation process for electrical separation between devices, and more particularly, to a method of forming a trench type device isolation film. SUMMARY OF THE INVENTION An object of the present invention is to provide a method for forming a trench type device isolation layer of a semiconductor device capable of securing a gap-fill margin of an HDP oxide layer while preventing loss of a stress buffer layer for a liner nitride layer when the HDP oxide layer is deposited for trench filling. . The present invention replaces the existing liner nitride / liner oxide structure with a liner nitride / tantalum oxide (Ta 2 O 5 ) structure. That is, a tantalum oxide film is used as the stress buffer layer of the liner nitride film. Since tantalum oxide is more etch resistant than conventional CVD oxide, no loss occurs even when high plasma power is applied at the beginning of HDP oxide deposition. On the other hand, since the tantalum oxide film has similar stress characteristics to the conventional CVD oxide film, the tantalum oxide film can sufficiently perform the role of the stress buffer layer.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100703841-B1
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Total number of triples: 24.