http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20020064129-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F13-364 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F13-36 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-362 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-36 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-364 |
| filingDate | 2001-06-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_65852bf6811e4da09caaa7a021089021 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4cf1d7931cdef6dd89f10403a3f334c9 |
| publicationDate | 2002-08-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-20020064129-A |
| titleOfInvention | System on a chip having system bus, external bus, and bus arbiter with programmable priorities for both buses, article, and method for assigning programmable priorities |
| abstract | The semiconductor device, in particular, a system on a chip (SOC) according to the present invention, includes a plurality of functional blocks installed in a semiconductor chip, and at least one moving path for providing data moving in and out of the functional blocks installed in the semiconductor chip. A system bus, an external bus serving as a movement path of data between the functional blocks and functional blocks installed outside the semiconductor chip, and functional blocks installed inside and outside the semiconductor chip use the system bus and the external bus. And a multi- jurisdiction bus mediator mounted on the semiconductor chip. The functional blocks acting as masters for the system bus or the external bus among the functional blocks transmit request signals for obtaining permission to use the buses to the multi-jurisdiction bus mediator. The multi- jurisdiction bus arbitrator assigns priorities to the request signals by referring to the priority schedule stored therein. The priority schedule may be pre-programmed to classify the request signals according to the type of buses for which the request signals require use, and then assign priorities to maximize the use efficiency of the buses. In addition, the multi- jurisdiction / multi-channel GDMA block is designed to operate as a master block of the system bus or the external bus. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100583455-B1 |
| priorityDate | 2001-01-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 20.