http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20020045869-A

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filingDate 2000-12-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c12ee282475891baaad6cddf001067cd
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publicationDate 2002-06-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20020045869-A
titleOfInvention Method for forming contact hole and spacer of semiconductor device
abstract The present invention can prevent contact failure due to mask misalignment, prevent voids from occurring in an interlayer insulating film between neighboring conductive film patterns, and reduce parasitic capacitance between conductive film patterns. The present invention relates to a method of forming a hole and a spacer, and the present invention provides a method for depositing an interlayer insulating film immediately after forming a conductive film pattern such as a gate electrode and a bit line, and defining a contact hole pattern of at least one of a straight line, a T-shape, or an I-shape. The insulating film spacer is formed on the sidewalls of the conductive film pattern after the contact hole is formed by etching using the mask or in the process of forming the contact hole.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100689677-B1
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Total number of triples: 28.