http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20020045655-A
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02255 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0217 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02236 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02126 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76229 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-762 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-76 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242 |
filingDate | 2000-12-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_eb1388c0338890d67dea853f456edfd0 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_47a70332376586989253f056dce41afb |
publicationDate | 2002-06-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | KR-20020045655-A |
titleOfInvention | Semiconductor device having shallow trench isolation structure and method for manufacturing the same |
abstract | The present invention discloses a semiconductor device having an STI structure capable of minimizing the occurrence of leakage currents between adjacent P-FETs and a method of manufacturing the same. The disclosed invention is provided with a plurality of trenches that also separate between the elements to be formed in each region while separating the cell region where memory elements are to be formed and the core region and the peripheral region where P-FETs and other circuit elements are to be formed. A semiconductor substrate, a first sidewall oxide film formed on an inner surface of the plurality of trenches, a second sidewall oxide film formed on a surface of a first sidewall oxide film of a trench formed in a core region and a peripheral region of the plurality of trenches, and a cell of the plurality of trenches. A first buffer liner formed on a surface of a first sidewall oxide film of a trench formed in a region and a second sidewall oxide film of a trench formed in a core region and a peripheral region, a first buffer liner formed on a surface of a first buffer liner of a trench formed in the cell region A second buffer liner, and each insulator embedded within the plurality of trenches. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101481574-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100839528-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100971432-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100567070-B1 |
priorityDate | 2000-12-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 33.