http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20020041224-A

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37
classificationCPCAdditional http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3125
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31053
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02126
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02164
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02255
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31138
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31144
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76801
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02222
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02282
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76837
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02326
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02337
classificationIPCAdditional http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-314
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-312
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-31
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-302
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-4763
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-316
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-311
filingDate 2000-11-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0f07941777346c5ae7009acb552c76ff
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c01a707156eaec86a344012580f660bd
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_57b616431e2194b6ac71cd7d950526da
publicationDate 2002-06-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20020041224-A
titleOfInvention Forming method for interlayer dielectric of semiconductor device
abstract The present invention discloses a method of forming an interlayer insulating film of a semiconductor device capable of filling a gap between conductive lines without causing voids or cracks. The present invention first forms a conductive line on a semiconductor substrate. Then, a polysilazane-based SOG film is coated on the resultant product on which the conductive line is formed. Next, the SOG film of the polysilazane series is baked. Then, the C-F type gas having a C / F ratio of 0.5 or more and an SOG film etching selectivity to the silicon nitride film of 10 or more is used to etch back the polysilazane-based SOG film until the top of the conductive line is exposed. Then, the remaining SOG film of the polysilazane series is etched back to form a silicon oxide film as an interlayer insulating film.
priorityDate 2000-11-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419522015
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID14917
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419559581
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID3084099
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID24261
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419578708
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID457707758
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419559562
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID297

Total number of triples: 41.