| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_44ff3005508304394801e265e503b811 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2201-0195
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2201-0175
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2201-0179
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2201-09509
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-0315
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-4644 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L22-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K1-162 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R1-073
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K1-16
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-46 |
| filingDate |
2001-09-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_35f1c40ad505e5fe027dac9790bac674
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a238226227bd5d44c0acaf0b4bb0de3f |
| publicationDate |
2002-03-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20020020863-A |
| titleOfInvention |
Multilayer interconnection substrate and method of fabricating the same |
| abstract |
An object of the present invention is to provide a multi-layered wiring board for a wafer collective contact board and a method of manufacturing the same, which can form a capacitor at low cost without changing the substrate volume (area and height, especially height). BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board constituting a part of a wafer collective contact board or the like, which is used to collectively perform a test of a plurality of semiconductor devices formed on a wafer, wherein a contact hole formed by stacking wires with an insulating layer interposed therebetween A multilayer wiring board having a structure in which upper and lower wirings are connected (conducted) through the wirings, characterized in that the capacitor 11 is integrally provided in the multilayer wiring layer between upper and lower wirings. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100753037-B1 |
| priorityDate |
2000-09-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |