| abstract |
The present invention describes a method for surface mountable chip scale packaging of electronic and MEMS devices. The surface mount chip scale packaging method for electronic and MEMS devices according to the present invention, the surface mount chip scale packaging method for electronic and MEMS devices according to the present invention, the semiconductor processing technology and fine Forming interconnection and sealing structure patterns using processing technology, filling the pattern groove of the cover second substrate with glass or ceramic material as an insulator, and using chemical mechanical polishing (CMP) method After flattening the cover second substrate, a thin metal film is deposited and patterned, and the cover second substrate is precisely aligned and bonded at the wafer level with the first substrate for the device in which the electronic device or the MEMS device is collectively manufactured. The upper surface of the second substrate for the cover is again polished by chemical mechanical polishing (CMP) method and then a metal electrode pattern is formed to interconnect the electronic device or the MEMS device. The rconnection and sealing are performed in a batch, and the two substrates on which the interconnection and the sealing are completed are diced to complete a chip scale package. |