http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20010045420-A

Outgoing Links

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1a492183be65153abfa7dec00d51c816
classificationCPCAdditional http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02126
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31056
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76819
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76826
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76828
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76829
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-31
filingDate 1999-11-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c5b22538e002f0c1a3b9adc7f402746c
publicationDate 2001-06-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20010045420-A
titleOfInvention Method for forming interlayer insulating layer of semiconductor device
abstract The present invention can prevent the step difference of the sense amplifier region from increasing after the formation of the interlayer insulating film, and can solve the problem of increasing the step difference between the cell block region, the test pattern region, the decoder region, and the sense amplifier region after the metal wiring is formed. In the chemical vapor deposition apparatus, the first protective film is formed on the semiconductor substrate on which the substructure is completed, and using a reaction source of SiH 4 , H 2 O 2 , H 2 O, O 2 -10 ℃ to 50 Forming an SiO x H y oxide film as an interlayer insulating film at a temperature between &lt; RTI ID = 0.0 &gt; C &lt; / RTI &gt; and a pressure lower than 100 Torr, forming a second protective film on the SiO x H y oxide film, and forming a cell block region and a sense on the second protective film. forming an etching mask for opening the amplifier region, the cell block area and removing the oxide film SiO x H y portion of the sense amplifier region, and the first etch mask, The cusp to expose the boundary portion where the etching mask has been formed, there is provided a semiconductor device manufacturing method of flattening and removing the cusp.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-110349855-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-110349855-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100547243-B1
priorityDate 1999-11-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 24.