| abstract |
When forming the silicide layer in a self-aligned manner on the diffusion region used as a diode or a well resistance, by limiting the portion where the silicide layer is to be formed using a spacer within a specific range, up to the "silicide layer side to the diffusion region side" Disclosed are a semiconductor device having a SOI structure and a method of fabricating the same, so that the distance L2 of the present invention can be secured to be sufficiently larger than that of the conventional one, and thus the junction leakage current generated in the diffusion region side can be minimized.n n n The semiconductor device includes a double junction structure having a different concentration gradient (for example, a structure in which a P-layer surrounds a P + layer or a N- layer in an N + layer) using spacers in a diffusion region used as a diode (or well resistance). Encapsulating structure), and the silicide layer is designed to be formed only on the surface of a high concentration impurity layer, that is, a P + layer or an N + layer, or (2) has a diffusion region used as a diode (or well resistance) as a single junction structure, The spacer is designed to limit the range in which the silicide layer is formed on the diffusion region. |