| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e5db580deca7130dbe51805c6c608b35 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-22
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-0805
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1084
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1087
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1078
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-0816
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-222
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-413 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-081
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-413
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-22 |
| filingDate |
2000-04-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ceeae1c33d8cd2e140081d4af06d5277
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e02973cec2345acbc0a26d09de5cb8b0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_83e3a736d4f3a726e59871247c944858
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0e00252dca9d000e2292bf50139d53e1
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3e10903008483b9a747df7a3ce99427e |
| publicationDate |
2001-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20010006950-A |
| titleOfInvention |
Semiconductor device using external power voltage for timing sensitive signals |
| abstract |
A semiconductor device that is supplied with a stable external power source includes a step-down voltage generation circuit that generates internally stepped-down power supply, an input circuit that operates based on the internally stepped-down power source, and causes a change in the internally stepped-down power source; A clock control circuit for generating a clock signal, an output circuit for outputting a data signal to the outside of the semiconductor device at an output timing in response to the internal clock signal, and an internal clock signal from the clock control circuit to the output circuit and internally stepping down And a clock transfer circuit that operates based on an external power source to form an output timing that is substantially unaffected by a change in one power source. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100510485-B1 |
| priorityDate |
1999-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |